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TDA8779H Datasheet, PDF (10/20 Pages) NXP Semiconductors – 10-bit converter interface ADC/DAC for quadrature transceiver
Philips Semiconductors
10-bit converter interface (ADC/DAC) for
quadrature transceiver
Product specification
TDA8779H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
TRANSFER FUNCTION
INLD
DNLD
tst
integral non linearity
differential non linearity
settling time
ramp input;
−
fCLK = 20 MHz
ramp input;
−
fCLK = 20 MHz
10% to 90% full-scale; −
Tamb = 25 °C
10% to 90% for 10%
−
full-scale; Tamb = 25 °C
MATCHING BETWEEN CHANNEL I AND Q
∆V
amplitude matching
fo = 4.43 MHz;
−
fCLK = 20 MHz;
Tamb = 25 °C
∆ϕ
phase matching
fo = 4.43 MHz;
−
fCLK = 20 MHz;
Tamb = 25 °C
DYNAMIC RANGE; note 1
NF
noise floor
fo = 4.43 MHz;
−56
fCLK = 20 MHz
SPURIOUS FREE DYNAMIC RANGE
SFDR spurious free dynamic
fo = 4.43 MHz;
−
range
fCLK = 20 MHz
STANDBY MODE OUTPUT DELAY; STDBYD; Tamb = 25 °C
td(stb)LH standby delay
−
(LOW-to-HIGH transition)
td(stb)HL start-up delay
−
(HIGH-to-LOW transition)
±0.4
±0.35
8.0
7
0.2
−
−61
55
−
−
±1.25
LSB
±1.5
LSB
−
ns
−
ns
6
%
2
deg
−
dB
−
dB
100
µs
100
µs
CROSSTALK ON THE DAC
αct
crosstalk on the DAC
fCLK(DAC) = 16.384 MHz; −60
−75
−
dB
fCLK(ADC) = 8.192 MHz;
Tamb = 25 °C; one DAC
switching between input
codes 0 and 1023 the
other DAC set at the
middle code; both ADCs
1 V (p-p) sine wave at
4 MHz; incoherent
Notes
1. The noise floor is the maximum value of the output spectrum without taking into account fundamental and harmonics
of the input signal up to the 6th harmonic.
2. Harmonics are obtained via a Fast Fourier Transformer (FFT) treatment taking 8k acquisition points per period.
3. It is recommended that the DAC output voltage is AC coupled in order to achieve optimum performance.
1999 Sep 16
10