TDA8433 Datasheet, PDF (10/25 Pages) NXP Semiconductors – Deflection processor for computer controlled TV receivers

Philips Semiconductors
Deflection processor for computer
controlled TV receivers
Product specification
TDA8433
SYMBOL
PARAMETER
CONDITIONS
DACC output (pin 6)
Z₆
output impedance at VTR(A) and
VTR(C) where:
(A) = '0'; (C) = '0'
(A) = '0'; (C) = '1'
(A) = '1'; (C) = '0'
(A) = '1'; (C) = '1'
DACB horizontal phase (pin 7)
V₇
output voltage
at HEX00
at HEX3F
∆V₇
variable DC output voltage for
setting horizontal frequency
R₇
internal resistance
step size
RR
ripple rejection
note 3
DACA horizontal frequency (pin 8)
V₈
output voltage
at HEX00
at HEX3F
∆V₈
variable DC output voltage for
setting horizontal frequency
R₈
internal resistance
step size
RR
ripple rejection
note 3
OUT video switch (pin 9)
FOR EXTERNAL CVBS SWITCH WHEN CVBS BIT = 1
V₉
saturation voltage
I_L
leakage current
I_sink = 1 mA
I/O combined input/output (pin 10)
V₁₀
when used as an output (open
collector)
where PHI1 = '0'
where PHI1 = '1'
I_sink
sink current
V₁₀
when used as an input (switching PHI1 = '0'
point HCENT is '0' to '1')
I₁₀
input current
MIN.
TYP.
MAX. UNIT
5.5
7.5
2.4
3.3
0.7
1.0
−
50
9.5
kΩ
4.2
kΩ
1.35
kΩ
−
Ω
−
0.05
9.4
10.0
0.05 −
−
0.3
10
−
26
−
0.2
V
11.0
V
10
V
1.0
kΩ
190
%
−
dB
−
0.05
9.5
10.0
0.05 −
−
0.3
10
−
26
−
0.2
V
11.0
V
10
V
1.0
kΩ
190
%
−
dB
−
−
−
−
0.4
V
2
µA
−
−
−
−
−
−
V₁₇ − V₁₇
35 mV
−
−
V_CC
V
0.4
V
2
mA
V₁₇ +
V
35 mV
2
µA
August 1991
10