UJA1078ATW Datasheet, PDF (1/54 Pages) NXP Semiconductors – High-speed CAN/dual LIN core system basis chip

UJA1078A
High-speed CAN/dual LIN core system basis chip
Rev. 2 — 28 January 2011
Product data sheet
1. General description
The UJA1078A core System Basis Chip (SBC) replaces the basic discrete components
commonly found in Electronic Control Units (ECU) with a high-speed Controller Area
Network (CAN) and two Local Interconnect Network (LIN) interfaces.
The UJA1078A supports the networking applications used to control power and sensor
peripherals by using a high-speed CAN as the main network interface and the LIN
interfaces as local sub-busses.
The core SBC contains the following integrated devices:
• High-speed CAN transceiver, inter-operable and downward compatible with CAN
transceiver TJA1042, and compatible with the ISO 11898-2 and ISO 11898-5
standards
• LIN transceivers compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with
LIN 1.3
• Advanced independent watchdog (UJA1078A/xx/WD versions)
• 250 mA voltage regulator for supplying a microcontroller; extendable with external
PNP transistor for increased current capability and dissipation distribution
• Separate voltage regulator for supplying the on-board CAN transceiver
• Serial Peripheral Interface (SPI) (full duplex)
• 2 local wake-up input ports
• Limp home output port
In addition to the advantages gained from integrating these common ECU functions in a
single package, the core SBC offers an intelligent combination of system-specific
functions such as:
• Advanced low-power concept
• Safe and controlled system start-up behavior
• Detailed status reporting on system and sub-system levels
The UJA1078A is designed to be used in combination with a microcontroller that
incorporates a CAN controller. The SBC ensures that the microcontroller always starts up
in a controlled manner.