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PSMN020-150W Datasheet, PDF (1/4 Pages) NXP Semiconductors – TrenchMOS transistor | |||
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Philips Semiconductors
TrenchMOS⢠transistor
Objective specification
PSMN020-150W
FEATURES
SYMBOL
⢠âTrenchâ technology
⢠Very low on-state resistance
⢠Fast switching
⢠High thermal cycling performance
⢠Low thermal resistance
d
g
s
QUICK REFERENCE DATA
VDSS = 150 V
ID = 73 A
RDS(ON) ⤠20 mâ¦
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope using âtrenchâ
technology. The device has very
low on-state resistance. It is
intended for use in dc to dc
converters and general purpose
switching applications.
The PSMN020-150W is supplied in
the SOT429 (TO247) conventional
leaded package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT429 (TO247)
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ËC to 175ËC
Tj = 25 ËC to 175ËC; RGS = 20 kâ¦
Tmb = 25 ËC
Tmb = 100 ËC
Tmb = 25 ËC
Tmb = 25 ËC
MIN.
-
-
-
-
-
-
-
- 55
MAX.
150
150
± 20
73
51
290
300
175
UNIT
V
V
V
A
A
A
W
ËC
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
EAS
Non-repetitive avalanche Unclamped inductive load, IAS = 64 A;
energy
tp = 0.2 ms; Tj prior to avalanche = 25ËC;
VDD ⤠25 V; RGS = 50 â¦; VGS = 5 V
IAS
Non-repetitive avalanche
current
MIN.
-
MAX.
1255
UNIT
mJ
-
73
A
February 1999
1
Rev 1.000
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