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PSMN005-25D Datasheet, PDF (1/9 Pages) NXP Semiconductors – N-channel logic level TrenchMOS transistor | |||
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Philips Semiconductors
Product specification
N-channel logic level TrenchMOS⢠transistor
PSMN005-25D
FEATURES
⢠âTrenchâ technology
⢠Very low on-state resistance
⢠Fast switching
⢠Logic level compatible
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 25 V
ID = 75 A
RDS(ON) ⤠5.8 m⦠(VGS = 10 V)
RDS(ON) ⤠7.5 m⦠(VGS = 5 V)
GENERAL DESCRIPTION
SiliconMAX products use the latest
Philips Trench technology to
achieve the lowest possible
on-state resistance in each
package at each voltage rating.
Applications:-
⢠d.c. to d.c. converters
⢠switched mode power supplies
The PSMN005-25D is supplied in
the SOT428 (Dpak) surface
mounting package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain1
3 source
tab drain
SOT428 (DPAK)
tab
2
1
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Continuous gate-source
voltage
Peak pulsed gate-source
voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ËC to 175ËC
Tj = 25 ËC to 175ËC; RGS = 20 kâ¦
Tj ⤠150 ËC
Tmb = 25 ËC; VGS = 5 V
Tmb = 100 ËC; VGS = 5 V
Tmb = 25 ËC
Tmb = 25 ËC
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
± 15
± 20
752
70
240
125
175
UNIT
V
V
V
V
A
A
A
W
ËC
1 It is not possible to make connection to pin 2 of the SOT428 package.
2 Continuous current rating limited by package.
October 1999
1
Rev 1.100
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