PHX3055E Datasheet, PDF (1/8 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PHX3055E
FEATURES
• ’Trench’ technology
• Low on-state resistance
• Fast switching
• Isolated mounting tab
SYMBOL
d
g
s
QUICK REFERENCE DATA
V_DSS = 55 V
I_D = 9 A
R_DS(ON) ≤ 150 mΩ (V_GS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode,
field-effect power transistor in a
plastic envelope with an electrically
isolated mounting tab. The device
uses ’trench’ technology to achieve
low on-state resistance.
Applications:-
• d.c. to d.c. converters
• switched mode power supplies
The PHX3055E is supplied in the
SOT186A (isolated TO220AB)
conventional leaded package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab isolated
SOT186A
case
12 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DSS
V_DGR
V_GS
I_D
I_DM
P_D
T_j, T_stg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
T_j = 25 ˚C to 150˚C
T_j = 25 ˚C to 150˚C; R_GS = 20 kΩ
T_hs = 25 ˚C
T_hs = 100 ˚C
T_hs = 25 ˚C
T_hs = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
± 20
9
5.6
36
21
150
UNIT
V
V
V
A
A
A
W
˚C
ISOLATION LIMITING VALUE & CHARACTERISTIC
T_hs = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V_isol
R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal
three terminals to external
waveform;
heatsink
R.H. ≤ 65% ; clean and dustfree
C_isol
Capacitance from T2 to external f = 1 MHz
heatsink
MIN. TYP. MAX. UNIT
-
2500 V
-
10
-
pF
August 1999
1
Rev 1.000