BUK7514-55A Datasheet, PDF (1/9 Pages) NXP Semiconductors – TrenchMOS standard level FET

Philips Semiconductors
TrenchMOS transistor
Standard level FET
Product specification
BUK7514-55A
BUK7614-55A
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope
available in TO220AB and SOT404 .
Using ’trench’ technology which
features very low on-state
resistance. It is intended for use in
automotive and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
I_D
P_tot
T_j
R_DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V_GS = 10 V
MAX.
55
73
149
175
14
PINNING
TO220AB & SOT404
PIN DESCRIPTION
1 gate
2 drain
3 source
tab/mb drain
PIN CONFIGURATION
mb
tab
SYMBOL
d
2
13
SOT404
1 23
TO220AB
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DS
V_DGR
±V_GS
I_D
I_D
I_DM
P_tot
T_stg, T_j
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
R_GS = 20 kΩ
-
T_mb = 25 ˚C
T_mb = 100 ˚C
T_mb = 25 ˚C
T_mb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
R_{th j-mb}
R_{th j-a}
R_{th j-a}
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient(TO220AB)
Thermal resistance junction to
ambient(SOT404)
CONDITIONS
-
in free air
Minimum footprint, FR4
board
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
20
73
52
266
166
175
TYP.
-
60
50
MAX.
0.9
-
-
UNIT
V
A
W
˚C
mΩ
UNIT
V
V
V
A
A
A
W
˚C
UNIT
K/W
K/W
K/W
July 2000
1
Rev 1.000