BUK100-50DL Datasheet, PDF (1/10 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK100-50DL
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 3 pin plastic
envelope, intended as a general
purpose switch for automotive
systems and other applications.
APPLICATIONS
General controller for driving
lamps
motors
solenoids
heaters
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
I_D
P_D
T_j
R_DS(ON)
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
I_ISL
Input supply current
V_IS = 5 V
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Overload protection against
over temperature
Overload protection against
short circuit load
Latched overload protection
reset by input
5 V logic compatible input level
Control of power MOSFET
and supply of overload
protection circuits
derived from input
Lower operating input current
permits direct drive by
micro-controller
ESD protection on input pin
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
INPUT
O/V
CLAMP
RIG
LOGIC AND
PROTECTION
MAX.
50
13.5
40
150
125
650
UNIT
V
A
W
˚C
mΩ
µA
DRAIN
POWER
MOSFET
SOURCE
PINNING - TO220AB
PIN
DESCRIPTION
1 input
2 drain
3 source
tab drain
Fig.1. Elements of the TOPFET.
PIN CONFIGURATION
SYMBOL
tab
D
TOPFET
I
P
1 23
S
November 1996
1
Rev 1.200