PI2EQX3201BL Datasheet, PDF (3/5 Pages) Pericom Semiconductor Corporation – 3.0Gbps 2 Differential Channel SATA i/m ReDriver with Equalization, De-emphasis and OOB

PI2EQX3201BL
3.0Gbps 2 Differential Channel Serial ReDriver
Equalization, De-emphasis and Squelch
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Storage Temperature........................................................ –65°C to +150°C
Supply Voltage to Ground Potential.................................... –0.5V to +2.5V
DC SIG Voltage..........................................................–0.5V to V_DD +0.5V
Current Output ................................................................-25mA to +25mA
Power Dissipation Continous.......................................................... 500mW
Operating Temperature........................................................... -40 to +85°C
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
AC/DC Electrical Characteristics (V_DD = 1.4 to 1.9V)
Symbol
Parameter
Conditions
I_DD
Power Supply Current
P_standby
Power, standby
EN_[A:B] = 0
P_active18
Power, active @ 1.8V
V_DD=1.8V, EN_[A:B] = 1, V_rx-diff-p≥ V_th-sd
P_idle18
Power, idle @ 1.8V
V_DD=1.8V, EN_[A:B] = 1, V_rx-diff-p < V_th-sd
P_active15
Power, active @ 1.5V
V_DD=1.5V, EN_[A:B] = 1, V_rx-diff-p ≥ V_th-sd
P_idle15
Power, idle @ 1.5V
V_DD=1.5V, EN_[A:B] = 1, V_rx-diff-p < V_th-sd
t_pd
Latency
From differential input to differential output
Min.
Typ.
125
100
100
80
2.0
Max.
90
1
160
130
Units
mA
mW
mW
mW
mW
mW
ns
CML Receiver Input
RL_RX
V_RX-DIFFP-P
Return Loss
Differential Input Peak-to-
peak Voltage
V_RX-CM-ACP
AC Peak Common Mode
Input Voltage
V_TH−SD
Signal Detect Threshold
Z_RX-DIFF-DC
DC Differential Input
Impedance
Z_RX-DC
DC Input Impedance
50 MHz to 1.25 GHz
EN_X = High
12
0.200
50
80 100
40
50
dB
V
150
mV
200
120
Ohm
60
Equalization
J_RS
J_RM
Residual Jitter^(1,2)
Random Jitter^(1,2)
Total Jitter
Deterministic jitter
0.3
Ulp-p
0.2
1.5
psrms
Notes
1. K28.7 pattern is applied differentially at point A as shown in Figure 1.
2. Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum
deterministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or
equivalent for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or
its equivalent. The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. JItter is measured at
0V at point C of Figure 1.
10-0220
3
PS9003A
09/07/10