PI2EQX3201BL Datasheet, PDF (2/5 Pages) Pericom Semiconductor Corporation – 3.0Gbps 2 Differential Channel SATA i/m ReDriver with Equalization, De-emphasis and OOB

PI2EQX3201BL
3.0Gbps 2 Differential Channel Serial ReDriver
Equalization, De-emphasis and Squelch
Pin Description
Pin #
2
3
27
26
22
21
7
8
30
29
4, 9, 20, 24, 25,
Center Pad
11, 12, 17, 18, 19
Pin Name
AI+
AI-
AO+
AO-
BI+
BI-
BO+
BO-
EN_A
EN_B
GND
NC
36
SD_A
35
SD_B
34
33
13
14
32
15
31
16
1, 5, 6, 10, 23, 28
SEL0_A
SEL1_A
SEL0_B
SEL1_B
SEL2_A
SEL2_B
SEL3_A
SEL3_B
V_DD
I/O
Description
I CML Input Channel A with internal 50-Ohm pull down
O
CML Output Channel A internal 50-Ohm pull up. Drives to output common mode
voltage when input is <V_TH–.
I CML Input Channel B with internal 50-Ohm pull down
O
CML Output Channel B with internal 50-Ohm pull up. Drives to output common
mode voltage when input is <V_TH–.
I
EN_[A:B] is the enable pin. A LVCMOS high provides normal operation. A LVC-
MOS low selects a low power down mode.
PWR Supply Ground
- No Connect
Signal Detect, output for channels A and B. Provides a LVCMOS high output when
O a valid input signal is detected. When low, SD_X indicates that the input signal
level is below the signal detect threshold level.
I
Selection pins for equalizer (see Amplifier Configuration Table)
w/ 25K-Ohm internal pull up
I
I
I
I
I
PWR
Selection pins for amplifier (see Amplifier Configuration Table)
w/ 25K-Ohm internal pull up
Selection pins for De-Emphasis (See De-Emphasis Configuration Table)
w/ 25K-Ohm internal pull up
1.5 to 1.8V Supply Voltage (±0.1V)
Output Swing Control
SEL2_[A:B]
Swing
0
1x
1
1.2x
Output De-emphasis Adjustment
SEL3_[A:B]
De-emphasis
0
0dB
1
-3.5dB
Equalizer Selection
SEL0_[A:B] SEL1_[A:B]
0
0
0
1
1
0
1
1
Compliance Channel @ 1.5GHz
no equalization
1.5dB ± 1.0dB
3.5dB ± 1.0dB
5.5dB ± 1.0dB
10-0220
2
PS9003A
09/07/10