English
Language : 

PI3WVR31313A Datasheet, PDF (26/27 Pages) Pericom Semiconductor Corporation – DP/HDMI 1:3 De-multiplexer switches
PI3W VR31313A
DP/HDMI 1:3 De-multiplexer switches
ID Access Sequence Specified in DP Interoperability V1.1A
It is suggested that the Source-side cable adaptor have a voltage-level shifter to convert the 5-V HPD signal from a DVI/HDMI Sink
Device to +2.25V ~ +3.6V voltage as specified the HPD signal input voltage range of DisplayPort Specification Ver.1.1a.
DDC Buffer ID of a Source-side HDMI Cable Adaptor
Offset 0
1
2
3
4
5
6
7
8
9
Ah Bh Ch Dh Eh Fh
Data 44h 50h 2Dh 48h 44h 4Dh 49h 20h 41h 44h 41h 50h 54h 4Fh 52h 04h
Table below shows the I2C transaction sequence for a Source Device to read the DDC Buffer ID of the Source-side HDMI cable adap-
tor. I2C write for setting the address offset is optional for a Dual-mode Source Device. The HDMI cable adaptor must acknowledge it
when it receives this write operation. The DVI cable adaptor must NACK the I2C transaction to Device Address 80h/81h.
DDC Buffer ID Access Sequence
Bit Bit Bit Bit Bit Bit Bit
Phase I2C Transaction Transmitting 7 6 5 4 3 2 1 R/W#
Status
Master
Slave
1
Start
Master
2
Write command Master
Optional
-
100 0 0 0 0
0
Optional
-
3
Acknowledge
Slave
4
Word address
offset
Master
5
Acknowledge
Slave
6
Stop
Master
Word address offset data byte
-
Optional
-
Optional
Mandatory
-
Mandatory
-
7
Start
Master
8
Read command Master
9
Acknowledge
Slave
100 0 0 0 0
Mandatory
-
1 Mandatory
-
-
Mandatory
10
Read data
11
Acknowledge
12
Read data
Slave
Master
Slave
Data byte at Offset 0
Data byte at Offset 1
-
Mandatory
-
Mandatory
Mandatory
13
40
Read data
Slave
Data byte at Offset 15
-
...
-
...
-
Mandatory
41
Not acknowlegde Master
42
Stop
Master
Mandatory
-
Mandatory
-
Note: if the Slave does not acknowledge during the above transaction sequence, the entire sequence should be retried by the source.
All trademarks are property of their respective owners.
15-0162
26
www.pericom.com 12/03/15