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PI3WVR31313A Datasheet, PDF (11/27 Pages) Pericom Semiconductor Corporation – DP/HDMI 1:3 De-multiplexer switches
PI3W VR31313A
DP/HDMI 1:3 De-multiplexer switches
Parameter
Description
Test Conditions
High Speed Channel Port3 (D[0:2]P3/N3, CLKP3/N3)
VI(open)
RT
IOZ
Ioff
Single-ended input voltage under
high impedance input or open
input
Input termination resistance
Leakage current resistance
Power off leakage current
IL=10uA
VIN=2.9V
VDD=3.6V, OEB=High
VDD=0, VIN=3.6V
Min. Typ. Max. Unit
VDD-10
VDD+10 mV
45
50
66 ohm
30
100 uA
-100
100 uA
Dynamic Electrical Characteristics over Operating Range
(TA = -40º to +105ºC, VDD = 3.3V ±10%)
Parameter Description
Test Conditions
Min.
TMDS Differential Pins
tpd
Propagation delay
Differential output signal rise time
tr
(20% - 80%)
tf
Differential output signal fall time VDD = 3.3V, Rout = 50Ω off, open
(20% - 80%)
drain, 0dB pre-emphasis
tsk(p)
tsk(D)
tsk(o)
Tjit_clk(pp)
Tjit_dat(pp)
Pulse skew
Intra-pair differential skew
Inter-pair differential skew(2)
Peak-to-peak output jitter CLK
residual jitter
Peak-to-peak output jitter DATA
Residual Jitter
Data Input = 3.4 Gbps HDMI data
pattern from signal generation,
short trace.
CLK Input = 340 MHz clock
ten
Enable time
tdis
Disable time
when channel is active
SCL, SDA channel, AUX channel , CAB channel : passive switches
tpd(DDC)
Propagation delay from SCLn/
SDAn to SCL/SDA or SCL/SDA to
SCLn/SDAn In passive SW on.
CL = 10pF, in passive switch
SCL3, SDA3- SCL,SDA channel : buffers
tPLH
LOW-to-HIGH propagation delay SCL/SDA to SCL3/SDA3
50
tPHL
HIGH-to-LOW propagation delay SCL/SDA to SCL3/SDA3
10
tPLH
LOW-to-HIGH propagation delay SCL3/SDA3 to SCL/SDA
50
tPHL
HIGH-to-LOW propagation delay SCL3/SDA3 to SCL/SDA
10
Typ.
120
120
15
25
15
25
100
20
100
20
Max. Unit
2000
50
ps
50
100
40
50
10
us
50
5
ns
150 ns
40
ns
150 ns
40
ns
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15-0162
11
www.pericom.com 12/03/15