PI29FCT520T Datasheet, PDF (2/5 Pages) Pericom Semiconductor Corporation – FAST CMOS MULTILEVEL PIPELINE REGISTERS

PI29FCT520/521T/2520T
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788^M990011^U2233^L44^T5566^I77^L8899^E0011^V2233^E44^L556677^P88^I99^P0011^E2211^L22^I3344^N55^E667788^R9900^E11^G2233^I44^S5566^T7788^E99^R0011^S2233
Product Pin Configuration
I0 ¹
I1 ²
24 _VCC
23 _S0
D0 3
22 S1
D1 4
21 Y0
D2 5 24-PIN 20 Y1
D3 6 P24 19 Y2
D4 ₇
D5 ₈
D6 ₉
Q24 _{18 Y3}
R24 _{17 Y4}
S24 _{16 Y5}
D7 ₁₀
15 ^Y6
CLK ₁₁
14 ^Y7
GND ₁₂
13 ^OE
Register Selection
S1
S0
0
0
0
1
1
0
1
1
Register
B2
B1
A2
A1
Product Pin Description
Pin Name
OE
CLK
I0,I1
S0,S1
Dx
Yx
GND
VCC
Description
Output Enable Input (Active LOW) for
3-State Output Port
Clock Input. Enter data into registers on
LOW-to-HIGH transistions
Instruction Inputs
Multiplexer Select. Inputs either register
A1, A2, B1, or B2 data to be avaialbe at the
output ports
Register Inputs
Register Outputs
Ground
Power
PI29FCT520/T2520T Data Loading
DUAL 2-LEVEL
SINGLE 4-LEVEL
A1
B1
A1
B1
A1
B1
A2
B2
A2
B2
I=2
I=1
NOTE: I = 3 FOR HOLD
PI29FCT521T Data Loading
DUAL 2-LEVEL
A2
B2
I=0
SINGLE 4-LEVEL
A1
B1
A1
B1
A1
B1
A2
B2
I=2
NOTE: I = 3 FOR HOLD
A2
B2
I=1
FCT520.pm6
2
A2
B2
I=0
2
12/18/96, 4:44 PM
PS2002B 12/10/96