PT7C4363 Datasheet, PDF (12/22 Pages) Pericom Semiconductor Corporation – Real-time Clock Module (I2C Bus)

Data Sheet
PT7C4363
Real-time Clock Module (I²C Bus)
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Operation example:
1. Set EXT_CLK test mode (control/status 1, bit TEST1 = 1)
2. Set STOP (control/status 1, bit STOP = 1)
3. Clear STOP (control/status 1, bit STOP = 0)
4. Set time registers to desired value
5. Apply 32 clock pulses to SQW
6. Read time registers to see the first change
7. Apply 64 clock pulses to SQW
8. Read time registers to see the second change.
Repeat 7 and 8 for additional increments.
2. Power-On Reset (POR) override
The POR duration is directly related to the crystal oscillator start-up time. Due to the long start-up times experienced by these
types of circuits, a mechanism has been built in to disable the POR and hence speed up on-board test of the device. The setting of
this mode requires that the I²C-bus pins, SDA and SCL, be toggled in a specific order as shown in Fig 6.4.2. All timings are
required minimums.
Once the override mode has been entered, the device immediately stops being reset and normal operation may commence i.e.
entry into the EXT_CLK test mode via I²C-bus access.
The override mode may be cleared by writing a logic 0 to TESTC. TESTC must be set to logic 1 before re-entry into the override
mode is possible. Setting TESTC to logic 0 during normal operation has no effect except to prevent from entering the POR
override mode.
Power up
Fig.3 POR override sequence
Override active
PT0207(07/05)
12
Ver: 0