PT7C4372A Datasheet, PDF (10/30 Pages) Pericom Semiconductor Corporation – Real-time Clock Module

PT7C4372A/4372C
Real-time Clock Module (I²C Bus)
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 ADJ or XSTP
ADJ: 30 second adjust bit. Second is adjusted within 122s (within 125s when 32.000kHz crystal is used) from writing
operation to ADJ.
ADJ Data
Description
Write
0 Ordinary operation.
Second adjustment. 1) For second range from “00” to “29”, second is reset to “00”;
1
2) For second range from “30” to “59”, second is reset to “00” and minute is incremented by 1.
XSTP: oscillator halt sensing bit.
XSTP Data
Read
0 Ordinary oscillation.
1 Oscillator halts sensing.
See section “Oscillation Stop Detection”.
Description
Default
 /CLEN
PT7C4372A FOUT 32-kHz clock output enabled bit.
/CLEN ^Data
Description
Read
0 32-kHz clock (frequency same as crystal’s) output enabled.
1 32-kHz clock output disabled.
Default
PT7C4372C FOUT 32-kHz clock output enabled bit.
/CLEN ^Data
Description
Read
0 32-kHz clock (frequency same as crystal’s) output enabled.
1 32-kHz clock output disabled.
Default
 CTFG
CTFG Data
Description
Read
0 Periodic interrupt output OFF status; /INTA or /INTB= OFF (Hi-z) Read
1 Periodic interrupt output ON status; /INTA or /INTB= "L"
Write
A "0" can be written only when the periodic interrupt is in level mode, at which time the
0 /INTA or /INTB pin is set to OFF (“H”) status. After a "0" is written, the value still becomes
"1" again at the next cycle.
1 Setting prohibited
See section “Related Registers” for more detail.
Default
Default
12-07-0001
PT0150-8 07/04/12
10