MN662785TBUC Datasheet, PDF (86/89 Pages) Panasonic Semiconductor – LSI FOR COMPACT DISC/CD ROM PLAYER

MN662785TBUC


DV_DD1,2ʹ3.3 V, DV_SS1,2ʹ0 V
AV_DD1,2ʹ3.3 V, AV_SS1,2ʹ0 V
Taʹʵ40°C to ʴ85°C
f_X1ʹ33.8688 MHz
Parameter
Symbol Conditions
Limits
Unit
Min Typ Max
DRAM Interface
C99 NRAS low-level pulse width
tr _{a s l}
C100 NRAS high-level pulse width
C101
C102
NCAS0 / NCAS1 low-level pulse
width
NCAS0 / NCAS1 high-level pulse
width
C103 NRAS address setup time
trash
tcasl
tcash
tr _{a d s}
C104 NCAS0 / NCAS1 address hold time ^tradh
6
tcy
2
tcy
4
tcy
4
tcy
1
tcy
1
tcy
C105 NCAS0 / NCAS1 address setup time ^tcads
2
tcy
C106 NCAS0 / NCAS1 address hold time ^tcadhw
3
tcy
C107 NCAS0 / NCAS1 data setup time
tcwds
3
tcy
C108 NCAS0 / NCAS1 data valid time
C109 NRAS data valid time
tcadv
tradv
120
ns
300
ns
C110 Data hold time
tcadhr
0
ns
C111 NWE delay time
tw _{c d}
3
tcy
C112 NWE pulse width
twel
C113
tref _{16 Mbits, full bits}
C114 ^{Refresh period}
(Playback fsʹ44.1 kHz)
C115
Memory system ON with decode
C116 _{sequence executed.}
tref
16 Mbits,
4-bit compression
tref _{4 Mbits, full bits}
tref
4 Mbits,
4-bit compression
C117
tref _{1 Mbit, full bits}
C118
tref
1 Mbit,
4-bit compression
tcy: One system clock cycle which is indicated as 1/(16.9344 MHz) seconds.
5
tcy
5.9
ms
23.3
ms
3.0
ms
11.7
ms
1.5
ms
5.9
ms
SDD00026AEM
86