MN662785TBUC Datasheet, PDF (64/89 Pages) Panasonic Semiconductor – LSI FOR COMPACT DISC/CD ROM PLAYER

MN662785TBUC
D. Serial data output timing
The following timing chart shows the output timing of serial data. Serial data output mode 1
and 2 are the same in the output timing of serial data.
Invalid
SRDATA
15
Invalid
1413121110 9 8 7 6 5 4 3 2 1 0
15
Invalid
1413121110 9 8 7 6 5 4 3 2 1 0
15
LRCK
BCLK
L-ch
R-ch
L-ch
7-2 (3) Serial data input
When the IC is in serial data output mode 1 or 2, the SRDATA signal, LRCK signal, and BCLK
signal will be input into pins 57, 58, and 59 respectively so that IOSTOP bit will be set to 0.
Therefore, handle pins 57, 58, and 59 as input pins in serial data output mode 1 or 2.
The input timing of serial data is the same as the output timing of serial data.
SDD00026AEM
64