MN1380 Datasheet, PDF (7/20 Pages) Panasonic Semiconductor – CMOS LSIs for Voltage Detection

Microcomputer Peripheral LSIs
Description of Operation
MN1380 Series
V_DD
V_DH
V_DL
1.5V
0V
t
V_OUT
CMOS output, N-channel MN1380/1381/1382
open drain output
MN13801/13811/13821
t_OH
t_OH
t_OL
t_OL
0V
t
V_OUT
Inverted CMOS
output Figure
MN13802/13812/13822
t_OL
t_OL
t_OH
t_OH
0V
t
Figure 1. Description of Operation
Notes
1: Output cannot be specified for power supply voltages under 1.5 V because operation is not guaranteed for that range.
2: V_DL: Detection voltage for drop in power supply voltage
V_DH: Detection voltage for rise in power supply voltage
t_OL : Time lag between the time that the power supply voltage reaches the detection voltage (V_DL or V_DH) and the time that the
output pin (OUT) goes to "L" level.
t_OH : Time lag between the time that the power supply voltage reaches the detection voltage (V_DL or V_DH) and the time that
the output pin (OUT) goes to "H" level.
3: These characteristics for the N-channel open drain output are when a load resistor is connected between the OUT and V_DD
pins.
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