MN89303A Datasheet, PDF (6/11 Pages) Panasonic Semiconductor – SVGA Display Controller

MN89303A
For Information Equipment
Pin Descriptions (continued)
Pin No. Symbol I/O Level
124 RESET
I
TTL
96 to 97 MA[1:0]
I CMOS
126/125 TEST/
MINTEST
1/128 XIN/
I/O
XOUT
CMOS
Function Description
Reset
"H" level input from this pin initializes the chip. If the host is in a
i386 mode, the chip aligns the clock phase with this signal.
Host Type
During a reset, these pins select the host type.
MA[1:0]
Host Type
00
ISA
01
386SX
10
386DX
11
486
Chip Test Condition
This pin selects the chip test mode.
Clock IN/OUT
These pins are the clock I/O pins. Connect them to a crystal
oscillator.
Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Power supply voltage
V_DD
Input pin voltage
V_I
Output pin voltage
V_O
Power dissipaiton
P_D
Operating ambient temperature
T_opr
Storage temperature
T_stg
– 0.3 to +7.0
V
– 0.3 to V_DD+0.3
V
– 0.3 to V_DD+0.3
V
1000
mW
0 to +70
˚C
– 55 to +150
˚C
Recommended Operating Conditions
Parameter
Symbol
Conditions
min
typ
max
Unit
Power supply voltage
V_DD
Ambient temperature
Ta
4.75
5.00
5.25
V
0
70
˚C
Rise time for input
Fall time for input
Oscillation frequency
Operating frequency
Operating frequency
t_r
0
t_f
0
f_OSC
At self-excited operation
25
f_opr1
At self-excited operation
25
f_opr2
Using external input
0
150
ns
150
ns
33
MHz
33
MHz
33
MHz