MN103SL7 Datasheet, PDF (6/9 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller

MN103SL7 Series
 Features (continued)
 CAN Controller
Channels : 1 channel
CAN 2.0B specification basis
Communication method : NRZ (Non-Return to Zero)
Transmission line : Interactive 2-wire serial communication
Communication speed: Max 1 Mbps
Data length : 0 to 8 byte
Message frame : Standard frame and extended frame are supported
(Standard frame format ID: 11 bits, Extended frame format ID: 29 bits)
Buffer size : 32 messages (32 × 132 bit)
Interrupt: 1 interrupt
Interrupt requests:
Bus-off state, error active state
Error alert state (When the error counter is over 96.)
Release the error alert state (When the error counter is under 96.)
Transmission/Reception end
Transmission/Reception error (Ack/Form/Stuff/ Bit1/ Bit0/CRC error)
 Serial Interface
2 channels
Serial 0 (Hardware LIN/Full duplex UART / Synchronous serial interface)
Synchronous serial interface
Overrun error detection
Transfer clock source: 1/2, 1/4, 1/16 and 1/64 of timer 0 underflow,
1/2, 1/4, 1/16 and 1/64 of timer 1 underflow,
1/2, 1/4, 1/16 and 1/64 of timer 2 underflow,
1/2, 1/4, 1/16 and 1/64 of timer 3 underflow, IOCLK/2, IOCLK/4, SBT0 pin
Transfer clock division value selection : Divided by 8, 16
Can be selected as the first bit to be transferred, Any transfer size from 2 to 8 bits can be selected.
Can be continuously transmitted, received or transmitted and received.
Maximum transfer rate: 5.0 Mbps
Full duplex UART
Parity check, Overrun and framing error detection
Transfer clock source: 1/2, 1/4, 1/16, and 1/64 of timer 0 underflow,
1/2, 1/4, 1/16, and 1/64 of timer 1 underflow,
1/2, 1/4, 1/16, and 1/64 of timer 2 underflow,
1/2, 1/4, 1/16, and 1/64 of timer 3 underflow,
IOCLK/2, IOCLK/4
Transfer clock division value selection : Divided by 8, 16
Can be selected as the first bit to be transferred, Any transfer size from 7 to 8 bits can be selected.
Continuous transmission, reception, and transmission/reception
Maximum transfer rate: 300 kbps
Hardware LIN
Operate in conjunction with Timer 4, 5 and 16.
Master communication: Synch Break field transmission
Slave communication: Wake-up reception, Synch Break field reception, Synch field reception, Check sum arithmetic
Error detection:
Check sum error, bit error
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Ver. AEM