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MN103SL7 Datasheet, PDF (4/9 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller | |||
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MN103SL7 Series
ï¢ Features (continued)
ï Interrupts (continued)
<DMA>
DMA0 transfer end interrupt
DMA0 request after DMA transfer end interrupt
DMA0 transfer request overï¬ow interrupt
DMA1 transfer end interrupt
DMA1 request after DMA transfer end interrupt
DMA1 transfer request overï¬ow interrupt
External interrupts
: 8 interrupts
External interrupt pins
: From IRQ00 to IRQ07
Interrupt detection condition : Each edge, both edges, high-level and low-level detection
Each interrupt detection condition is able to ï¬ltering with the noise ï¬lter
ï Timer Counter
8-bit timer
16-bit timer
8 sets
3 sets
Timer 0 (8-bit timer)
Interval timer, Timer pulse output, Event count, Baud rate timer
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM0IO pin input, Timer 1 underï¬ow, Timer 2 underï¬ow
Timer 1 (8-bit timer)
Interval timer, Timer pulse output, Event count, Baud rate timer, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM1IO pin input, Timer 0 underï¬ow, Timer 2 underï¬ow
Timer 2 (8-bit timer)
Interval timer, Baud rate timer, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, Timer 0 underï¬ow, Timer 1 underï¬ow
Timer 3 (8-bit timer)
Interval timer, Baud rate timer, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, Timer 0 underï¬ow, Timer 1 underï¬ow, Timer 2 underï¬ow
Timer 4 (8-bit timer)
Interval timer, Timer pulse output, Event count
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM4IO pin input, Timer 5 underï¬ow, Timer 6 underï¬ow
Timer 5 (8-bit timer)
Interval timer, Timer pulse output, Event count, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM5IO pin input, Timer 4 underï¬ow, Timer 6 underï¬ow
Timer 6 (8-bit timer)
Interval timer, Timer pulse output, Event count, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM6IO pin input, Timer 4 underï¬ow, Timer 5 underï¬ow
Timer 7 (8-bit timer)
Interval timer, Timer pulse output, Event count, Cascade connection
Count clock source: IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, TM7IO pin input, Timer 4 underï¬ow,
Timer 5 underï¬ow, Timer 6 underï¬ow
4
Ver. AEM
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