MN6153UC Datasheet, PDF (4/9 Pages) Panasonic Semiconductor – PLL LSI with Built-In Prescaler

MN6153UC
For Communications Equipment
MN6153 Frequency Dividing Data Settings
The following formula shows frequency divider operation.
F_IN ={ (16 × N) + A} × (X_IN ÷ R)
where
F_IN
: VCO output frequency
N
: Setting for 14-bit programmable counter on comparator side
A
: Setting for 4-bit swallow counter on comparator side
X_IN : Reference oscillator frequency
R
: Setting for 17-bit programmable counter on reference side
Note that N should be greater than A.
N-Side Latch Data
MSB 3 bits
14 bits
4 bits
LSB
Test data
Programmable counter
setting (N)
Swallow counter
setting (A)