MN6153UC Datasheet, PDF (1/9 Pages) Panasonic Semiconductor – PLL LSI with Built-In Prescaler

For Communications Equipment
MN6153UC
PLL LSI with Built-In Prescaler
Overview
The MN6153UC is a CMOS LSI for a phase-locked
loop (PLL) frequency synthesizer with serial data input.
It consists of a two-coefficient prescaler, variable
frequency divider, phase comparator, and charge pump.
It offers high-speed operation on a low power supply
voltage (1.0 to 1.4 V) and low power consumption (0.5
mW for V_DD=1.03 V, F_IN= 60 MHz).
Other features include intermittent operation by the
power save (PS) control signal and high-speed pull-in that
rapidly corrects the phase differences occurring at the start
of operation.
Features
Low power supply voltage: V_DD=1.0 to 1.4V
Low power consumption: 0.5mW (V_DD=V1.03V,
F_IN=60MHz)
High-speed operation: F_IN=60MHz
(V_DD=1.03V)
Frequency dividing ratios in reference frequency
dividing stage: 5 to 131,071
Frequency dividing ratios in comparator stage:
272 to 262,143
Lock detector output pin
Two types of phase comparator output
- Internal charge pump output
- Output for external charge pump
Output monitor pins for both comparator and reference
frequency dividing stages
Pin Assignment
X_IN
1
X_OUT
2
FV 3
V_DD
4
D_OP
5
V_SS
6
V_CP
7
F_IN
8
16
OR
15
OV
14
LC
13
FR
12
PS
11
LE
10
DATA
9
CLK
(TOP VIEW)
SSOP016-P-0225