MN35503 Datasheet, PDF (4/9 Pages) Panasonic Semiconductor – D/A Converter for Digital Audio Equipment

MN35503
For Audio Equipment
Operating Mode Descriptions
Table 1-1. MN35503 Operating Modes
Mode Selection Pins
Pin States and Operating Modes
M1 Includes pull-up resistor
L
M2 Includes pull-up resistor
L
M3
L
H
L
MA
L
H
L
H
MDAT
MB
LHLHLHLH
MCLK
MC
RSBUP
MLAT
MD
RSBDN
L
H
MODE
0₀ 0₁ 0₂ 0₃ 1₀ 1₁ 1₂ 1₃
2₀
2₁
Serial mode
H
H
L
H
LHLH
RSBUP
RSBDN
3₀ 3₁ 3₂ 3₃
Input data form
Input word length (bits)
LRCK level for left channel data
Right-packed
16
H
*1
*2
*2
*2
XIN clock frequency (f_s)
384
192 576 384/576 256/384
256
See Table 3. See Table 3.
CKO output frequency (f_s)
DE-EMP. (f_s=[kHz])
Output level
VANS oversampling (f_s)
Theoretical signal-to-noise
ratio
(dB)
384/576 256/384
384
192 576
STOP
See Table 3. See Table 3.
– 44.1 32 48 – 44.1 – 32
See Table 3
– 44.1 32 48
0.598 × AV_DD
0.448 × AV_DD
64
32
96
64/96 64/96
64
122
95 138 122/138 116/132
116
Notes
*1:During 192 f_s operation, the chip supports fs clock speeds up to 88.2 kHz.
*2:During 576 f_s operation and 384 f_s operation in modes 2₁ or 6₁, the chip supports f_s clock speeds up to 32 kHz; for other
modes, it supports up to 48 kHz.