MN101E50 Datasheet, PDF(4/9 Page) Panasonic Semiconductor

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MN101E50 Datasheet, PDF (4/9 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller

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MN101E50 Series

ï¢ Features (continued)

ï Timer Counter: 11 sets

General-purpose 8-bit timer: 5 sets

General-purpose 16-bit timer: 2 sets

8-bit free-run timer: 1 set

Time-base timer: 1 set

Baud rate timer: 1 set

24 H timer: 1 set

<Timer 0> (General-purpose 8-bit timer)

Square wave output (Timer pulse output), added pulse (2 bits) type PWM output, event count, simple pulse width measurement

Large current output selectable

Clock source :

fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, Timer A output

Real-time control:

Timer (PWM) output is controlled among the three values: "Fixed to High", "Fixed to Low",

or "Hi-Z" at falling edge of External Interrupt 0 (IRQ0)

Double-buffered compare register (Ã1)

<Timer 1> (General-purpose 8-bit timer)

Square wave output (Timer pulse output), event count, timer synchronous output, 16-bit cascade connection (connected with Timer 0)

Clock source:

fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, Timer A output

Double-buffered compare register (Ã1)

<Timer 2> (General-purpose 8-bit timer)

Square wave output (Timer pulse output), added pulse (2 bits) type PWM output, event count, simple pulse width measurement

Large current output selectable, 24-bit cascade connection (connected with Timer 0, 1), timer synchronous output

Clock source:

fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, Timer A output

Real-time control:

Timer (PWM) output is controlled among three status: "Fixed to High", "Fixed to Low",

or "Hi-Z" at falling edge of External Interrupt 0 (IRQ0)

Double-buffered compare register (Ã1)

<Timer 3> (General-purpose 8-bit timer)

Square wave output (Timer pulse output), event count, 16-bit cascade connection (connected with Timer 2),

32-bit cascade connection (connected with Timer 0, 1, 2)

Double-buffered compare register (Ã1)

Clock source:

fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, Timer A output

<Timer 4> (General-purpose 8-bit timer)

Square wave output (Timer pulse output), added pulse (2 bits) type PWM output, event count, simple pulse width measurement

Clock source:

fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-div/64, fpll-div/128, fs/2, fs/4, fs/8, fslow, external clock, Timer A output

<Timer 6> (8-bit free-run timer, time-base timer)

8-bit free-run timer

Clock source:

fpll-div, fpll-div/22, fpll-div/23, fpll-div/212, fpll-div/213, fs, fslow, fslow/22, fslow/23, fslow/212, fslow/213

Time base timer

Interrupt generation cycle:

fpll-div/27, fpll-div/28, fpll-div/29, fpll-div/210, fpll-div/213, fpll-div/215, fslow/27, fslow/28, fslow/29, fslow/210,

fslow/213, fslow/215

Ver. AEM

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