MN195001 Datasheet, PDF (3/6 Pages) Panasonic Semiconductor – Single-Chip Fax Engine LSI

For Communications Equipment
Block Diagram
MN195001
VREFH
VREFL
IREF2 to 0
TXLPIN
TXOUT
RXLPIN
RXL
HPOUT
AGCIN
AGCOUT
SHIN
HV_DD
Analog front-end processor Clock
DTE
(AFP)
generator
I/F
CX ¹¹
SCX2 ¹⁰
9
SYNCA
42-45
MOD3 to 0
HDRES ¹²
Digital signal processor and CPU core
DV_{DD4 to 1}
DV_{SS4 to 1}
Facsimile
peripheral
control
circuits
Dual-port
RAM
MTA4 to 1
MTB4 to 1
MOT
SH4 to 1
VBCK
VIR
VSCK
VSEN
VSDA
VPCK
VPST
VPDA
S15 to 0
UC3 to 0
IRO4 to 1
ADCK
EYSY
EOMD
PLSD
UITCK
U1SD
U1RCK
U1RD
U1ST
U2TCK
U2SD
U2RCK
U2RD
U2ST