MN3881S Datasheet, PDF (2/4 Pages) Panasonic Semiconductor – PAL-Compatible CCD Video Signal Delay Element

MN3881S
Block Diagram
CCD Delay Line Series
Auto bias circuit
16
VINC
Charge input
block
CCD 567 stages
Charge
detection block
Resampling output
amplifier
2
VOC
øS driver
ø1 driver
ø2 driver
øR driver
øSH driver
øSH driver
Timing adjustment
XI ^{13 Waveform amplifier}
adjustment block
1/2nd frequency
doubler
Timing adjustment
øS driver
ø1 driver
ø2 driver
øR driver
øSH driver
øSH driver
Auto clamp circuit
9
VINY
Charge input
block
CCD 566.5 stages
Charge
detection block
Resampling output ⁷ _VOY
amplifier
2