MN3881S Datasheet, PDF (1/4 Pages) Panasonic Semiconductor – PAL-Compatible CCD Video Signal Delay Element

CCD Delay Line Series
MN3881S
PAL-Compatible CCD Video Signal Delay Element
Overview
The MN3881S is a CCD signal delay element for video
signal processing applications.
It contains such components as a shift register clock
driver, charge I/O blocks, 1/2nd frequency doubler, two
switchable CCD analog shift registers, a clamp bias cir-
cuit, resampling output amplifiers, a mode selection cir-
cuit and booster circuits.
When the switch pin is grounded, the MN3881S
samples the input using the supplied clock signal with a
frequency 8.8672375 MHz of twice the PAL color signal
subcarrier frequency, and after adding in the attached fil-
ter delay, produces independent delays of 1 H (the hori-
zontal scan period for the PAL system) for the Y output
and 2 H for the C output.
Features
Single 4.9 V power supply
Single chip combining luminance signal delay element
and delay element for color signal converted to low
frequency.
Applications
VCRs
Pin Assignment
VBIASC
1
VOC
2
N.C.
3
V_DD
4
–V_BB
5
N.C.
6
VOY
7
VBIASY
8
16
VINC
15
N.C.
14
N.C.
13
XI
12
V_SS
11
SW
10
N.C.
9
VINY
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SOP016-P-0225
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