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NCP1632 Datasheet, PDF (9/25 Pages) ON Semiconductor – Interleaved, 2-Phase Power Factor Controller
NCP1632
Furthermore, if the two channels are properly operated
out−of−phase, a large part of the switching−frequency
ripple currents generated by each individual branch cancel
when they add within the EMI filter and the bulk
capacitors. As a result, EMI filtering is significantly eased
and the bulk capacitor rms current is drastically reduced.
Interleaving therefore extends the CrM power range by
sharing the task between the two phases and by allowing for
a reduced input current ripple and a minimized bulk
capacitor rms current.
This is why this approach which at first glance, may
appear more costly than the traditional 1−phase solution
can actually be extremely cost−effective and efficient for
powers above 300 watts. And even less for applications like
LCD and Plasma TV applications where the need for
smaller components, although more numerous, helps meet
the required low−profile form−factors.
Vin
ILIt(iont )
Acline
IIilnine
EMI
Filter
Cin
1
16
2
15
3
14
4
13
5
12
Vcc
6
11
7
10
8
9
Rsense
Branch 1
IL1
Vaux 1
Branch 2
IL 2
Vaux 2
ID1
ID 2
Cbulk
ID(tot)
Vout
LOAD
Figure 3. Interleaved PFC Stage
The NCP1632 manages the 180−degree phase shift
between the two branches by modulating the oscillator
swing as a function of the current cycle duration in the
inductor of each individual phase. This ON proprietary
technique ensures an accurate, stable and robust control of
the delay between the two branches in all situations
(including transient phases) and whatever the operation
mode is (CrM or DCM).
The NCP1632 is a voltage mode controller. As a result,
the input current is optimally shared between the two
branches if they have an inductor of same value. If the
inductances differ, out−of−phase operation will not be
affected. Simply, the branch embedding the lowest−value
inductor, will process more power as:
Pbranch1
Pbranch2
+
L branch2
L branch1
(eq. 1)
Inductor typical deviation being below ±5%, the power
between 2 branches should not differ from more than 10%.
Provided its interleaving capability, the protections it
features and the medium− to light−load efficiency
enhancements it provides compared to traditional CrM
circuits, the NCP1632 is more than recommendable for
powers up to 600 W with universal mains and up to 1 kW
in narrow mains applications.
NCP1632 On−time Modulation
The NCP1632 incorporates an on−time modulation
circuitry to support both the critical and discontinuous
conduction modes. Figure 4 portrays the inductor current
absorbed in one phase of the interleaved PFC stage. The
initial inductor current of each switching cycle is always
zero. The inductor current ramps up when the MOSFET is
on. The slope is (VIN/L) where L is the inductor value. At
the end of the on−time (t1), the coil demagnetization phase
starts. The current ramps down until it reaches zero. The
duration of this phase is (t2). The system enters then the
dead−time (t3) that lasts until the next clock is generated.
The ac line current is the averaged inductor current as the
result of the EMI filter “polishing” action. Hence, the line
current produced by one of the phase is:
Iin
+
Vin
t1(t1 ) t2)
2T L
(eq. 2)
Where (T = t1 + t2 + t3) is the switching period and Vin
is the ac line rectified voltage.
Figure 4. Current Cycle Within a Branch
Eq. 2 shows that the input current is proportional to the
input voltage
if
⎛
⎢⎢⎝
t1
(t1 +
T
t2
)⎞
⎟⎟⎠
is
a
constant.
This is what the NCP1632 does. Using the “Vton
processing block” of Figure 5, the NCP1632 modulates t1
so that
⎛
⎢⎢⎝
t1
(t1 +
T
t2
)
⎞
⎟⎟⎠
remains a
constant:
t1(t1 )
T
t2)
+
Ct
@
VREGUL
It
(eq. 3)
Where Ct and It respectively, are the capacitor and charge
current of the internal ramp used to control the on−time and
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