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MC33470_06 Datasheet, PDF (9/15 Pages) ON Semiconductor – Synchronous Rectification DC/DC Converter Programmable Integrated Controller
MC33470
External loop compensation is required for converter
stability. Compensation components may be connected from
the compensation pin to ground. The error amplifier input is
tied to the sense pin which also has an internal 20 mA current
source to ground. The current source is intended to provide a
24 mV offset when an external 1.2 k resistor is placed
between the output voltage and the sense pin. The 24 mV
offset voltage is intended to allow a greater dynamic load
regulation range within a given specified tolerance for the
output voltage. The offset may be increased by increasing the
resistor value. The offset can be eliminated by connecting the
sense pin directly to the regulated output voltage.
The voltage reference consists of an internal, low
temperature coefficient, reference circuit with an added offset
voltage. The offset voltage level is the output of the
digital−to−analog converter. Control bits VID0 through VID4
control the amount of offset voltage which sets the value of
the voltage reference, as shown in Table 1. The VID0−4 input
bits each have internal 10 k pullup resistances. Therefore, the
reference voltage, and the output voltage, may be
programmed by connecting the VID pins to ground for logic
“0” or by an open for a logic “1”. Typically, a logic “1” will
be recognized by a voltage > 0.67 x VCC. A logic “0” is a
voltage < VCC/3.
MOSFET Switch Outputs
The output MOSFETs are designed to switch a maximum
of 18 V, with a peak drain current of 2.0 A. Both G1 and G2
output drives are designed to switch N−channel MOSFETs.
Output drive controls to G1 and G2 are phased to prevent
cross conduction of the internal IC output stages. Output dead
time is typically 100 nanoseconds between G1 and G2 in
order to minimize cross conduction of the external switching
MOSFETs.
Current Limit and Soft−Start Controls
The soft−start circuit is used both for initial power
application and during current limit operation. A single
external capacitor and an internal 10 mA current source
control the rate of voltage increase at the error amplifier
output, establishing the circuit turn on time. The G1 output
will increase from zero duty cycle as the voltage across the
soft−start capacitor increases beyond about 0.5 V. When the
soft−start capacitor voltage has reached about 1.5 V, normal
duty cycle operation of G1 will be allowed.
An overcurrent condition is detected by the current limit
amplifier. The current limit amplifier is activated whenever the
G1 output is high. The current limit amplifier compares the
voltage drop across the external MOSFET driven by G1, as
measured at the IFB pin, with the voltage at the Imax pin.
Because the Imax pin draws 190 mA of input current, the
overcurrent threshold is programmed by an external resistor.
Referring to Figure 14, the current limit resistor value can be
determined from the following equation:
R1
+
[(
IL(max))( RDS(on))]
( Imax)
where:
IL(max)
+
IO
) Iripple
2
IO = Maximum load current
Iripple = Inductor peak to peak ripple current
OUTEN Input and OT Output Pins
On and off control of the MC33470 may be implemented
with the OUTEN pin. A logic “1” applied the OUTEN pin,
where a logic “1” is above 2.0 V, will allow normal operation
of the MC33470. The OUTEN pin also has multiple
thresholds to provide over temperature protection. An
negative temperature coefficient thermistor can be connected
to the OUTEN pin, as shown in Figure 16. Together with RS,
a voltage divider is formed. The divider voltage will decrease
as the thermistor temperature increases. Therefore, the
thermistor should be mounted to the hottest part on the circuit
board. When the OUTEN voltage drops below 2.0 V
typically, the MC33470 OT pin open collector output will
switch from a logic “1” to a logic “0”, providing a warning to
the system. If the OUTEN voltage drops below 1.7 V, both G1
and G2 output driver pins are latched to a logic “0” state.
VCC
10 k
OT
VCC
RS
MC33470
OUTEN
NTC
Thermistor
Figure 16. OUTEN/OT Overtemperature Function
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