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MC33470_06 Datasheet, PDF (8/15 Pages) ON Semiconductor – Synchronous Rectification DC/DC Converter Programmable Integrated Controller
12 V
5.0 V
Internal
Vref
2.5 V
1.5 V
Compensation
G1
MC33470
UVL Threshold
UVL Threshold
Timing Capacitor
G2
Figure 15. Timing Diagram
OPERATING DESCRIPTION
The MC33470 is a monolithic, fixed frequency power
switching regulator specifically designed for dc−to−dc
converter applications which provide a precise supply voltage
for state of the art processors. The MC33470 operates as fixed
frequency, voltage mode regulator containing all the active
functions required to directly implement digitally
programmable step−down synchronous rectification with a
minimum number of external components.
Oscillator
The oscillator frequency is internally programmed to
300 kHz. The charge to discharge ratio is controlled to yield
a 95% maximum duty cycle at the switch outputs. During the
fall time of the internal sawtooth waveform, the oscillator
generates an internal blanking pulse that disables the G1 output
switching MOSFET. The internal sawtooth waveform has a
nominal peak voltage of 2.5 V and a valley voltage of 1.5 V.
Pulse Width Modulator
The pulse width modulator consists of a comparator with
the oscillator ramp voltage applied to the noninverting input,
while the error amplifier output is applied to the inverting
input. Output switch conduction is initiated when the ramp
waveform is discharged to the valley voltage. As the ramp
voltage increases to a voltage that exceeds the error
amplifier output, the latch resets, terminating output G1
MOSFET conduction, and turning on output G2 MOSFET,
for the duration of the oscillator ramp. This PWM/latch
combination prevents multiple output pulses during a given
oscillator cycle.
The sense voltage input at Pin 6 is applied to the
noninverting inputs of a pair of high speed comparators. The
high speed comparators’ inverting inputs are tied 0.96 x Vref
and 1.04 x Vref, respectively, to provide an optimum response
to load changes. When load transients which cause the output
voltage to fall outside a "4% regulation window occur, the
high speed comparators override the PWM comparator to
force a zero or maximum duty cycle operating condition until
the output voltage is once again within the linear window.
When voltages are initially provided to the supply pins,
VCC and PVCC , undervoltage lockout circuits monitor each
of the supply voltage levels. Both G1 and G2 output pins are
held low until the VCC pin voltage exceeds 4.0 V and the
PVCC pin voltage exceeds 9.0 V.
Error Amplifier and Voltage Reference
The error amplifier is a transconductance type amplifier,
having a nominal transconductance of 800 mmho. The
transconductance has a negative temperature coefficient.
Typical transconductance is 868 mmho at 0°C and 620 mmho
at 125°C junction temperature. The amplifier has a cascode
output stage which provides a typical 3.0 Mega−Ohms of
impedance. The typical error amplifier dc voltage gain is
67 dB.
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