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MC33470_06 Datasheet, PDF (11/15 Pages) ON Semiconductor – Synchronous Rectification DC/DC Converter Programmable Integrated Controller
MC33470
PIN FUNCTION DESCRIPTION
Pin
Name
Description
1
G2
This is a high current dual totem pole output Gate Drive for the Lower, or rectifier, N−channel MOSFET. Its output
swings from ground to PVCC. During initial power application, both G2 and G1 are held low until both VCC and
PVCC have reached proper levels.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 2
PVCC
This is a separate power source connection for driving N−channel MOSFETs from the G1 and G2 outputs. It may
be connected to 12 V.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 3
PGND This is a separate power ground return that is connected back to the power source. It is used to reduce the
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ effects of switching transient noise on the control circuitry.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 4
AGND This pin is the ground for the control circuitry.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 5
VCC
This pin is the positive supply of the control IC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 6
Sense This pin is used for feedback from the output of the power supply. It has a 20 mA current source to ground which
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ can be used to provide offset in the converter output voltage.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 7
Imax
This pin sets the current limit threshold. 190 mA must be sourced into the pin. The external resistor is determined
from the following equation: R = ([RDS(on)] [ILIM]/[190 mA])
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 8
IFB
This pin has two functions. First, it provides cycle−by−cycle current limiting. Second, if the current is excessive,
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ this pin will reinitiate a soft−start cycle. If the voltage at the IFB pin drops below the voltage at the Imax pin when
G1 is on, the controller will go into current limit. The current limit circuit can be disabled by floating the Imax pin
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ and shorting the IFB pin to VCC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 9
SS
This is the soft−start pin. A capacitor at this pin, in conjunction with a 10 mA internal current source, sets the
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ soft−start time. During moderate overload (current limit with VO > 50% of the set value), the soft−start capacitor
will be discharged by an internal 90 mA current source in order to reduce the duty cycle of G1. During hard
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ current limit (current limit with VO < 50% of set value), the soft−start capacitor will be discharged by a 64 mA
current source.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 10
Comp This pin is provided for compensating the error amp for poles and zeros encountered in the power supply system,
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ mostly the output LC filter.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 11
OT
This is the over temperature fault pin. OT is an open drain output that will be pulled low if the OUTEN pin is less
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ than 2.0 V.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 12
Fault
This pin indicates a fault condition. Fault is an open drain output that switches low if VO exceeds 115% of its set
value. Once triggered, the controller will remain in this state until the power supply is recycled or the OUTEN pin
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ is toggled.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 13
Pwrgd This pin is an open drain output which indicates that VO is properly regulated. A high level on Pwrgd indicates that
VO is within "4% of its set value for more than 400 ms. Pwrgd will switch low if VO is outside "4% for more than
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 100 ms.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 14
VID4 Voltage ID pin. This CMOS−compatible input programs the output voltage as shown in Table 2. This pin has an
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ internal 10 k pullup resistor to VCC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 15
VID3 Voltage ID pin. This CMOS−compatible input programs the output voltage as shown in Table 2. This pin has an
internal 10 k pullup resistor to VCC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 16
VID2 Voltage ID pin. This CMOS−compatible input programs the output voltage as shown in Table 2. This pin has an
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ internal 10 k pullup resistor to VCC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 17
VID1 Voltage ID pin. This CMOS−compatible input programs the output voltage as shown in Table 2. This pin has an
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ internal 10 k pullup resistor to VCC.
18
VID0 Voltage ID pin. This CMOS−compatible input programs the output voltage as shown in Table 2. This pin has an
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ internal 10 k pullup resistor to VCC.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 19
OUTEN This is the on/off control pin. A CMOS−compatible logic “1” allows the controller to operate. This pin can also be
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ used as a temperature sensor to trigger the OT pin (when OUTEN drops below 2.0 V OT pulls low). When
OUTEN drops below 1.7 V for longer than 50 ms, the controller will shut down.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 20
G1
This is a high current dual totem pole output Gate Drive for the Upper, or switching, N−channel MOSFET. Its
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ output swings from ground to PVCC. During initial power application, both G2 and G1 are held low until both VCC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ and PVCC have reached proper levels.
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