CAT34C02 Datasheet, PDF (9/15 Pages) Catalyst Semiconductor – 2-Kb I2C EEPROM for DDR2 DIMM Serial Presence Detect

CAT34C02
Table 9. SWP COMMANDS
Action
Control Pin Levels
(Note 12)
WP A₂ A₁ A₀
Flag State
(Note 13)
Slave Address
ACK Address ACK Data ACK Write
PSWP RSWP b₇ to b₄ b₃ b₂ b₁ b₀ ^?
Byte
? Byte ? Cycle
X
A₂ A₁ A₀
1
X
A₂ A₁ A₀ X No
Set GND A2 A1 A0
0
X
PSWP _{VCC A2}
A₁
A₀
0
X
A₂ A₁ A₀ 0 Yes
A₂ A₁ A₀ 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X
A₂ A₁ A₀
0
X
A₂ A₁ A₀ 1 Yes
X GND GND V_HV
1
X
0 0 1 X No
X GND GND V_HV
0
Set
RSWP ^{GND GND GND VHV}
0
V_CC GND GND V_HV
0
1
0 0 1 X No
0
0110 0 0 1 0 Yes
0
0 0 1 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X GND GND V_HV
0
0
X GND V_CC V_HV
1
X
0 0 1 1 Yes
0 1 1 X No
Clear GND GND VCC V_HV
0
X
RSWP _{VCC GND VCC VHV}
0
X
0 1 1 0 Yes
0 1 1 0 Yes
X
Yes X Yes Yes
X
Yes X No No
X GND V_CC V_HV
0
X
0 1 1 1 Yes
12. Here A₂, A₁ and A₀ are either at V_CC or GND.
13. 1 stands for ‘Set’, 0 stands for ‘Not Set’, X stands for ‘don’t care’.
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SLAVE
ADDRESS
BYTE
ADDRESS
S
T
DATA
O
P
SDA LINE S
XXXXXXXX XXXXXXXX P
A
A
C
C
K
K
X = Don’t Care
Figure 14. Software Write Protect (Write)
AN
C or O
KA
C
K
S
T
S
BUS ACTIVITY: ^A
SLAVE
T
MASTER ^R ADDRESS ^O
T
P
SDA LINE S
P
AN
C or O
KA
C
K
Figure 15. Software Write Protect (Read)
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