MUN5311DW1 Datasheet, PDF (8/10 Pages) ON Semiconductor – Complementary Bias Resistor Transistors

MUN5311DW1, NSBC114EPDXV6, NSBC114EPDP6
PACKAGE DIMENSIONS
E
2X
bbb H D
e
6X
ccc C
D
A
6
5
1
2
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
D
4
L2
E1
3
aaa C
2X 3 TIPS
H
L
DETAIL A
GAGE
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
B
TOP VIEW
6X b
ddd M C A-B D
A2
A
DETAIL A
A1
SIDE VIEW
C
SEATING
PLANE
c
END VIEW
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A −−− −−− 1.10 −−− −−− 0.043
A1 0.00 −−− 0.10 0.000 −−− 0.004
A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25 0.006 0.008 0.010
C 0.08 0.15 0.22 0.003 0.006 0.009
D 1.80 2.00 2.20 0.070 0.078 0.086
E 2.00 2.10 2.20 0.078 0.082 0.086
E1 1.15 1.25 1.35 0.045 0.049 0.053
e
0.65 BSC
0.026 BSC
L 0.26 0.36 0.46 0.010 0.014 0.018
L2
0.15 BSC
0.006 BSC
aaa
0.15
0.006
bbb
0.30
0.012
ccc
0.10
0.004
ddd
0.10
0.004
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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