CAT34TS00 Datasheet, PDF (6/14 Pages) ON Semiconductor – Digital Temperature Sensor

SCL FROM
MASTER
CAT34TS00
1
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
Figure 4. Acknowledge Timing
ACKNOWLEDGE
SCL
70%
t_SU:STA
SDA IN
t_F
t_LOW
70%
30%
t_HD:STA
70%
30%
SDA OUT
t_HIGH
t_R
70%
30%
t_HD:DAT
70%
t_SU:DAT
30%
t_DH
70%
30%
70%
30%
t_SU:STO
70%
70%
t_BUF
Figure 5. Bus Timing
Write Operations
To write data to one of the internal registers, the Master
creates a START condition on the bus, and then sends out the
appropriate Slave address (with the R/W bit set to ‘0’),
followed by the register address, followed by two data bytes.
The matching Slave will acknowledge the Slave address,
register address and each data byte (Figure 6). The Master
then ends the session by creating a STOP condition on the
bus. The STOP completes the register update.
Read Operations
Immediate Read
A CAT34TS00 presented with a Slave address containing
a ‘1’ in the R/W position will acknowledge the Slave address
and will then start transmitting the content of the register at
the current address pointer location. The Master stops this
transmission by responding with NoACK, followed by a
STOP (Figure 7).
Selective Read
The Read operation can be started from a specific address,
by preceding the Immediate Read sequence with a ‘data less’
Write sequence. The Master sends out a START, Slave
address and register address, but rather than following up
with data (as in a Write operation), the Master then issues
another START and continues with an Immediate Read
sequence (Figure 8).
BUS ACTIVITY: S
T
A
MASTER ^R
T
SDA LINE S
SLAVE
TS
SLAVE
ADDRESS
REGISTER
ADDRESS
DATA (MSB)
S
T
DATA (LSB)
O
P
P
A
A
A
A
C
C
C
C
K
K
K
K
Figure 6. Temperature Sensor Register Write
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