AMIS-52150 Datasheet, PDF (6/21 Pages) AMI SEMICONDUCTOR – Low-Power Transceiver with Clock and Data Recovery

AMIS−52150
Table 6. VCO CONTROL REGISTERS
Register (HEX)
0x06
Name
Charge Pump
VCO/PLL Control Registers
Bits
0, 1
VCO Current
2, 3, 4
PLL Divider
7
* Denotes the normal value.
States
00
01
10
11
000
001
010
011
100
101
110
111
0
1
Comments
20 mA
25 mA
50 mA*
100 mA
180 mA
220 mA
260 mA
300 mA
340 mA*
380 mA
420 mA
460 mA
Divider is 64
Divider is 128
LPFILT, Loop Filter Pin
The LPFILT pin connects the AMIS−52150 internal phase
lock loop (PLL) frequency synthesizer to an external loop
filter (Figure 4). An external loop filter allows the system
designer to optimize the operation of the AMIS−52150 in
order to meet the requirements for a specific end application.
Figure 4. Typical Loop Filter
RSSI/BG, Analog Output Pin
The RSSI/BG pin is used to output either the signal from
the RSSI circuits, or to output the voltage from the bandgap
voltage reference or a bypass capacitor node, respectively.
The RSSI output is a true analog representation of the
received signal level. The pin can also be programmed to
output the voltage of the bandgap voltage reference. When
using the AMIS−52150 in the clock and data recovery mode,
a capacitor needs to be connected from the RSSI/BG pin to
ground. A typical value for this capacitor is 2.2 nF.
Additional information on the CDR function can be found
later in this document. Table 7 presents the registers that
control the function of the RSSI/BG pin.
Table 7. RSSVBG PIN CONTROL REGISTERS
RSSI Pin Definition Control Registers
Register (HEX)
Name
Bits
States
Comments
0x0e
Bandgap on RSSI
3
0
Normal Operation
1
BG Output on RSSI*
0x1e
RSSI Ext Amp
4
0
Tri-stated
1
RSSI Signal
* Note that device needs to be in RX, TX or crystal-on mode for bandgap voltage to be present on pin.
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