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AMIS-52150 Datasheet, PDF (15/21 Pages) AMI SEMICONDUCTOR – Low-Power Transceiver with Clock and Data Recovery
AMIS−52150
Figure 13. Peak Slice Mode Waveform
Table 21. AUTO SLICE CONTROL REGISTERS
Register (HEX)
Name
Bits
0x0a
DATA SLICE THRESHOLD
All
0x0f
HYSTERESIS
0, 1
AUTOSLICE
2, 3
States
00
01
10
11
00
01
10
11
Comments
Set a Fixed Reference Level for the Slice Output to
be Compared to in the DAC Mode
0 mV Hysteresis Used in the Threshold Circuit
20 mV Hysteresis Used in the Threshold Circuit
50 mV Hysteresis Used in the Threshold Circuit
100 mV Hysteresis Used in the Threshold Circuit
DAC Mode Used for Data Detection (DEFAULT)
Average Mode Used for Data Detection
Peak Mode Used for Data Detection
DAC Mode Used for Data Detection
Data and Clock Recovery
Data recovered in a noisy environment or from a weak RF
signal is usually jittery. The AMIS−52150 can remove much
of that data jitter by recovering a synchronous clock signal
from the incoming data. The device can be set to achieve
auto slice data detection. The clock and data recovery
circuits can be programmed to generate a data clock for
synchronously clocking the data output from the transceiver,
removing much of the jitter in this process. The
AMIS−52150 has an internal PLL that must be programmed
to the frequency of the data by setting the values in the
FWORD register and setting the coefficients of the filter. If
these values are close to the data rate, the device will recover
the data clock from the incoming detected data. The CDR
circuit can also be set to a given tolerance with respect to the
frequency difference between the target data rate and the
actual data rate, in order to improve the performance of the
CDR function. The CDR circuit can also be configured to
reset after a programmed number of data time periods if no
data is received. This “stop and check” function allows the
CDR circuit to re-acquire the clock data when new data is
received, maintaining better clock to data synchronization.
Table 22 lists the registers associated with the data and
clock recovery function.
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