English
Language : 

AMIS30623C623BRG Datasheet, PDF (56/61 Pages) ON Semiconductor – Micro-stepping Motor Driver
AMIS−30623
SetPositionShort
This command is provided to the circuit by the LIN Master
to drive one, two or four motors to a given absolute position.
It applies only for half stepping mode (StepMode[1:0]
= “00”) and is ignored when in other stepping modes. See
Positioning for more details.
The physical address is coded on 4 bits, hence
SetPositionShort can only be used with a network
implementing a maximum of 16 slave nodes. These 4 bits
are corresponding to the bits PA[3:0] in OTP memory
(address 0x02) See Physical Address of the Circuit. For
SetPositionShort it is recommended to set HW0,
HW1 and HW2 to ’1’.
The priority encoder table (See Priority Encoder)
describes the cases where a SetPositionShort
command will be ignored.
SetPositionShort corresponds to the following LIN writing frames:
1. Two (2) data bytes frame for one (1) motor, with specific identifier (type #2)
Table 65. SetPositionShort WRITING FRAME TYPE #2
Structure
Byte
Content
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
Identifier
*
*
0
ID4
ID3
ID2
ID1
ID0
1
Data 1
Pos[10:8]
Broad
AD [3:0]
2
Data 2
Pos [7:0]
3
Checksum
Checksum over data
Where:
(*) According to parity computation
Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will go to Pos[10:0].
ID[5:0]: Dynamically allocated identifier to two data bytes SetPositionShort command.
2. Four (4) data bytes frame for two (2) motors, with specific identifier (type # 2)
Table 66. SetPositionShort WRITING FRAME TYPE #2
Structure
Byte
Content
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
Identifier
*
*
1
0
ID3
ID2
ID1
ID0
1
Data 1
Pos1[10:8]
1
AD1[3:0]
2
Data 2
Pos1[7:0]
3
Data 3
Pos2[10:8]
1
AD2[3:0]
4
Data 4
Pos2[7:0]
5
Checksum
Checksum over data
Where:
(*) according to parity computation
ID[5:0]: Dynamically allocated identifier to four data bytes SetPositionShort command.
Adn[3:0]: Motor #n physical address least significant bits (n ∈ [1,2]).
Posn[10:0]: Signed 11−bit position set point for Motor #n (see RAM Registers)
http://onsemi.com
56