TIP120_07 Datasheet, PDF (5/7 Pages) Diotec Semiconductor – Si-Epitaxial Planar Darlington Power Transistors

TIP120, TIP121, TIP122 (NPN); TIP125, TIP126, TIP127 (PNP)
20
10
5.0
2.0
1.0
0.5
0.2
0.1
0.05
0.02
1.0
500 ms
100 ms
dc
T_J = 150°C
BONDING WIRE LIMITED
THERMALLY LIMITED
1Ăms
@ T_C = 25°C (SINGLE PULSE)
5Ăms
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED V_CEO
TIP120, TIP125
TIP121, TIP126
TIP122, TIP127
2.0 3.0 5.0 7.0 10
20 30 50
V_CE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
70 100
Figure 5. Active-Region Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I_C - V_CE
limits of the transistor that must be observed for reliable
operation, i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on T_J(pk) = 150°C; T_C is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T_J(pk)
< 150°C. T_J(pk) may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown
10,000
5000
3000
2000
1000
500
300
200
100
50
30
20
10
1.0
T_C = 25°C
V_CE = 4.0 Vdc
I_C = 3.0 Adc
PNP
NPN
2.0 5.0 10 20 50 100 200 500 1000
f, FREQUENCY (kHz)
Figure 6. Small-Signal Current Gain
300
T_J = 25°C
200
C_ob
100
70
C_ib
50
30
0.1 0.2
PNP
NPN
0.5 1.0 2.0 5.0 10 20
V_R, REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance
50 100
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