MC74VHCT259A Datasheet, PDF (5/9 Pages) ON Semiconductor – 8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs

MC74VHCT259A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Condition
V_CC
T_A = 25°C
T_A ≤ 85°C −55°C ≤ T_A ≤ 125°C
(V)
Min Typ Max Min Max Min
Max Unit
V_IH Minimum High−Level
Input Voltage
4.5 to 5.5 2
2
2
V
V_IL Maximum Low−Level
Input Voltage
4.5 to 5.5
0.8
0.8
0.8
V
V_OH Maximum High−Level V_IN = V_IH or V_IL
V
Output Voltage
I_OH = −50 mA
4.5
4.4 4.5
4.4
4.4
V_IN = V_IH or V_IL
I_OH = −8 mA
4.5 3.94
3.8
3.66
V_OL Maximum Low−Level V_IN = V_IH or V_IL
Output Voltage
I_OL = 50 mA
4.5
0 0.1
0.1
V
0.1
V_IN = V_IH or V_IL
I_OH = 8 mA
4.5
0.36
0.44
0.52
I_IN Input Leakage Current V_IN = 5.5 V or GND 0 to 5.5
±0.1
±1.0
±1.0
mA
I_CC
Maximum Quiescent
V_IN = V_CC or GND
5.5
Supply Current
4.0
40.0
40.0
mA
I_CCT Additional Quiescent Any one input:
5.5
Supply Current
V_IN = 3.4 V
(per Pin)
All other inputs:
V_IN = V_CC or GND
1.35
1.5
1.5
mA
I_OPD Output Leakage Current V_OUT = 5.5 V
0
0.5
5
5
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input t_r = t_f = 3.0ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Test Conditions
T_A = 25°C
T_A = ≤ 85°C −55°C ≤ T_A ≤ 125°C
Min Typ Max Min Max Min
Max Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
Maximum Propagation
Delay, Data to Output
(Figures 6 and 11)
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ± 0.5V
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
8.5 11.0 1.0 13.0 1.0
8.5 16.0 1.0 18.0 1.0
6.0 8.0 1.0 9.5
1.0
6.0 10.0 1.0 11.5 1.0
13.0
ns
18.0
9.5
11.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPHL
Maximum Propagation
Delay, Address Select
to Output
(Figures 7 and 11)
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ± 0.5V
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
8.5 11.0 1.0 13.0 1.0
8.5 16.0 1.0 18.0 1.0
6.0 8.0 1.0 9.5
1.0
8.5 10.0 1.0 11.5 1.0
13.0
ns
18.0
9.5
11.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPLH^,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
Maximum Propagation
Delay, Enable to Output
(Figures 8 and 11)
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ± 0.5V
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
8.5 11.0 1.0 13.0 1.0
8.5 16.0 1.0 18.0 1.0
6.0 8.0 1.0 9.5
1.0
8.5 10.0 1.0 11.5 1.0
13.0
ns
18.0
9.5
11.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PHL Maximum Propagation V_CC = 3.3 ± 0.3V C_L = 15pF
Delay, Reset to Output
C_L = 50pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{(Figures 9 and 11)}
V_CC = 5.0 ± 0.5V C_L = 15pF
C_L = 50pF
8.5 11.0 1.0 13.0 1.0
8.5 16.0 1.0 18.0 1.0
6.0 8.0 1.0 9.5
1.0
8.5 10.0 1.0 11.5 1.0
13.0
ns
18.0
9.5
11.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ CIN Maximum Input
Capacitance
6 10
10
10
pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Typical @ 25°C, V_CC = 5.0V
C_PD
Power Dissipation Capacitance (Note 5)
30
pF
5. C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I_CC(OPR) = C_PD  V_CC  f_in + I_CC. C_PD is used to determine the no−load dynamic
power consumption; P_D = C_PD  V_CC2  f_in + I_CC  V_CC.
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