MC74VHCT00A Datasheet, PDF (5/7 Pages) Motorola, Inc – Quad 2-Input NAND Gate

MC74VHCT00A
AC ELECTRICAL CHARACTERISTICS C_load = 50 pF, Input t_r = t_f = 3.0 ns
T_A = 25°C
T_A ≤ 85°C
T_A ≤ 125°C
Symbol
Parameter
Test Conditions
Min Typ Max Min Max Min Max _Unit
t_PLH,
t_PHL
Maximum
Propogation Delay,
Input A or B to Y
V_CC = 3.3 ± 0.3 V
V_CC = 5.0 ± 0.5 V
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
4.1 10.0
5.5 13.5
3.1 6.9
3.6 7.9
11.0
15.0
8.0
9.0
13.0 ns
17.5
9.5
10.5
C_IN
Maximum Input
Capacitance
5.5 10
10
10 pF
Typical @ 25°C, V_CC = 5.0 V
C_PD
Power Dissipation Capacitance (Note 7)
17
pF
7. C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I_CC(OPR) = C_PD ¯ V_CC ¯ f_in + I_CC. C_PD is used to determine the no--load dynamic
power consumption; P_D = C_PD ¯ V_CC2 ¯ f_in + I_CC ¯ V_CC.
NOISE CHARACTERISTICS (Input t_r = t_f = 3.0ns, C_L = 50pF, V_CC = 5.0V, Measured in SO Package)
T_A = 25°C
Symbol
Characteristic
Typ
Max
Unit
V_OLP Quiet Output Maximum Dynamic V_OL
0.4
0.8
V
V_OLV
Quiet Output Minimum Dynamic V_OL
-- 0.4
-- 0.8
V
V_IHD
Minimum High Level Dynamic Input Voltage
2.0
V
V_ILD
Maximum Low Level Dynamic Input Voltage
0.8
V
A or B
50%
Y
t_PLH
50% V_CC
3.0 V
GND
t_PHL
V_OH
V_OL
Figure 5. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C_L*
*Includes all probe and jig capacitance
Figure 6. Test Circuit
INPUT
Figure 7. Input Equivalent Circuit
OUTPUT
*
*Parastic Diode
Figure 8. Output Equivalent Circuit
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