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| MC74VHC259_14 Datasheet, PDF (5/8 Pages) ON Semiconductor – 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter | |||
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MC74VHC259
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC
TA = 25°C
â55°C ⤠TA ⤠125°C
Symbol
Parameter
Condition
(V)
Min
Typ
Max
Min
Max Unit
VIH
Minimum HighâLevel
Input Voltage
2.0
1.5
3.0to 5.5 VCCX 0.7
1.5
V
VCCX 0.7
VIL
Maximum LowâLevel
Input Voltage
2.0
3.0to 5.5
0.5
VCCX 0.3
0.5
V
VCCX 0.3
VOH
Maximum HighâLevel
VIN = VIH or VIL
2.0
1.9
2.0
1.9
V
Output Voltage
IOH = â50 μA
3.0
2.9
3.0
2.9
4.5
4.4
4.5
4.4
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
2.58
4.5
3.94
V
2.48
3.8
VOL
Maximum LowâLevel
VIN = VIH or VIL
2.0
Output Voltage
IOL = 50 μA
3.0
4.5
0.0
0.1
0.0
0.1
0.0
0.1
0.1
V
0.1
0.1
VIN = VIH or VIL
IOL = 4 mA
3.0
IOL = 8 mA
4.5
0.36
0.36
V
0.44
0.44
IIN
Input Leakage Current
VIN = 5.5 V or GND 0 to 5.5
ICC
Maximum Quiescent
VIN = VCC or GND
5.5
Supply Current
±0.1
±1.0
μA
4.0
40.0
μA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Symbol
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPLH,
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPHL
Parameter
Maximum
Propagation Delay,
Data to Output
(Figures 6 and 11)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPLH,
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPHL
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPLH,
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPHL
Maximum
Propagation Delay,
Address Select to
Output
(Figures 7 and 11)
Maximum
Propagation Delay,
Enable to Output
(Figures 8 and 11)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tPHL
Maximum
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Propagation Delay,
Reset to Output
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ (Figures 9 and 11)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CIN
Maximum Input
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Capacitance
Test Conditions
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
VCC = 5.0 ± 0.5V
VCC = 3.3 ± 0.3V
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
TA = 25°C
Min Typ Max
6.0
8.5
8.5 12.5
4.9
8.0
7.0 10.0
6.0
8.5
8.5 12.5
4.9
8.0
7.0 10.0
6.0
8.5
8.5 12.5
4.9
8.0
7.0 10.0
6.0
8.5
8.5 12.5
4.9
8.0
7.0 10.0
6
10
TA ⤠85°C
Min Max
1.0 11.5
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5
1.0 14.5
1.0
9.5
1.0 11.5
10
â55°C ⤠TA â¤
125°C
Min Max Unit
1.0 11.5 ns
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5 ns
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5 ns
1.0 14.5
1.0
9.5
1.0 11.5
1.0 11.5 ns
1.0 14.5
1.0
9.5
1.0 11.5
10 pF
Typical @ 25°C, VCC = 5.0V
CPD
Power Dissipation Capacitance (Note 1)
30
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the noâload dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
http://onsemi.com
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