MC74VHC259_14 Datasheet, PDF (2/8 Pages) ON Semiconductor – 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter

MC74VHC259
A0 ¹
ADDRESS
INPUTS
A1
2
A2 ³
13
DATA IN
4 _Q0
5 _Q1
6 _Q2
7 _Q3
9 _Q4
10 _Q5
11 _Q6
12 _Q7
NONINVERTING
OUTPUTS
RESET ¹⁵
ENABLE ¹⁴
PIN 16 = V_CC
PIN 8 = GND
Figure 2. Logic Diagram
A0 ¹
A1 ²
A2 ³
13
14
15
BIN/OCT
1
0
4
Q0
2
1
5
Q1
4
2
6
Q2
3
7
Q3
4
8
Q4
ID
5
10
Q5
EN
6
11
Q6
R
7
12
Q7
A0 ¹
A1 ²
A2 ³
13
14
15
DMUX
0
0
4
Q0
G
0
7
2
1
2
5
Q1
6
Q2
3
7
Q3
4
8
Q4
ID
5
10
Q5
EN
6
11
Q6
R
7
12
Q7
Figure 3. IEC Logic Symbol
LATCH SELECTION TABLE
Address Inputs
CBA
LLL
L LH
LHL
L HH
HL L
HLH
HH L
HHH
Latch
Addressed
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
MODE SELECTION TABLE
Enable Reset
Mode
L
H
Addressable Latch
H
H
Memory
L
L
8−Line Demultiplexer
H
L
Reset
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