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MC74HC595A_16 Datasheet, PDF (5/13 Pages) ON Semiconductor – 8-Bit Serial-Input/Serial or Parallel-Output Shift Register
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MC74HC595A
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
VCC
Symbol
Parameter
V
fmax Maximum Clock Frequency (50% Duty Cycle)
2.0
(Figures 1 and 7)
3.0
4.5
6.0
tPLH, Maximum Propagation Delay, Shift Clock to SQH
2.0
tPHL
(Figures 1 and 7)
3.0
4.5
6.0
tPHL Maximum Propagation Delay, Reset to SQH
2.0
(Figures 2 and 7)
3.0
4.5
6.0
tPLH, Maximum Propagation Delay, Latch Clock to QA − QH
2.0
tPHL
(Figures 3 and 7)
3.0
4.5
6.0
tPLZ, Maximum Propagation Delay, Output Enable to QA − QH
2.0
tPHZ
(Figures 4 and 8)
3.0
4.5
6.0
tPZL, Maximum Propagation Delay, Output Enable to QA − QH
2.0
tPZH
(Figures 4 and 8)
3.0
4.5
6.0
tTLH, Maximum Output Transition Time, QA − QH
2.0
tTHL
(Figures 3 and 7)
3.0
4.5
6.0
tTLH, Maximum Output Transition Time, SQH
2.0
tTHL
(Figures 1 and 7)
3.0
4.5
6.0
Cin Maximum Input Capacitance
−
Cout Maximum Three−State Output Capacitance (Output in
−
High−Impedance State), QA − QH
Guaranteed Limit
–55 to 25_C ≤ 85_C ≤ 125_C
6.0
4.8
4.0
15
10
8.0
30
24
20
35
28
24
140
175
210
100
125
150
28
35
42
24
30
36
145
180
220
100
125
150
29
36
44
25
31
38
140
175
210
100
125
150
28
35
42
24
30
36
150
190
225
100
125
150
30
38
45
26
33
38
135
170
205
90
110
130
27
34
41
23
29
35
60
75
90
23
27
31
12
15
18
10
13
15
75
95
110
27
32
36
15
19
22
13
16
19
10
10
10
15
15
15
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
pF
pF
CPD Power Dissipation Capacitance (Per Package)*
Typical @ 25°C, VCC = 5.0 V
300
pF
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