MC74HC573A_05 Datasheet, PDF (5/8 Pages) ON Semiconductor – Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS

t_r
INPUT D
t_PLH
Q
90%
50%
10%
90%
50%
10%
t_TLH
MC74HC573A
SWITCHING WAVEFORMS
V_CC
t_f
V_CC
LATCH
ENABLE
50%
GND
GND
t_w
t_PHL
t_PLH
t_PHL
t_THL
Q ^50%
Figure 1.
Figure 2.
OUTPUT
3.0 V
ENABLE
50%
VALID
GND
V_CC
t_PZL
t_PLZ
HIGH
INPUT D
50%
GND
Q
50%
IMPEDANCE
t_PZH t_PHZ
10% V_OL
LATCH
t_SU
t_h
50%
V_CC
Q
1.3 V
90% VOH
HIGH
ENABLE
GND
IMPEDANCE
Figure 3.
Figure 4.
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C_L*
*Includes all probe and jig capacitance
Figure 5. Test Circuit
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kW
C_L*
CONNECT TO V_CC WHEN
TESTING t_PLZ AND t_PZL.
CONNECT TO GND WHEN
TESTING t_PHZ AND t_PZH.
*Includes all probe and jig capacitance
Figure 6. Test Circuit
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
LATCH ENABLE ¹¹
OUTPUT ENABLE ¹
D
Q
LE
D
Q
LE
DQ
LE
DQ
LE
DQ
LE
D
Q
LE
D
Q
LE
D
Q
LE
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
Figure 7. EXPANDED LOGIC DIAGRAM
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