MC74HC573A_05 Datasheet, PDF (2/8 Pages) ON Semiconductor – Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS

PIN ASSIGNMENT
OUTPUT
ENABLE
1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 V_CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 ^LATCH
ENABLE
FUNCTION TABLE
Inputs
Output Latch
Enable Enable D
Output
Q
L
H
H
L
H
L
L
L
X
H
X
X
X = Don’t Care
Z = High Impedance
H
L
No Change
Z
MC74HC573A
Design Criteria
Internal Gate Count*
Value
54.5
Internal Gate Progation Delay
1.5
Internal Gate Power Dissipation
5.0
Speed Power Product
0.0075
*Equivalent to a two−input NAND gate.
Units
ea.
ns
mW
pJ
LOGIC DIAGRAM
DATA
INPUTS
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
NONINVERTING
OUTPUTS
LATCH ENABLE ¹¹
OUTPUT ENABLE ¹
PIN 20 = V_CC
PIN 10 = GND
ORDERING INFORMATION
Device
Package
Shipping^†
MC74HC573AN
PDIP−20
18 Units / Rail
MC74HC573ANG
SOIC−20
(Pb−Free)
18 Units / Rail
MC74HC573ADW
SOIC−20 WIDE
38 Units / Rail
MC74HC573ADWG
SOIC−20 WIDE
(Pb−Free)
38 Units / Rail
MC74HC573ADWR2
SOIC−20 WIDE
1000 Tape & Reel
MC74HC573ADWR2G
SOIC−20 WIDE
(Pb−Free)
1000 Tape & Reel
MC74HC573ADT
TSSOP−20*
75 Units / Rail
MC74HC573ADTG
TSSOP−20*
75 Units / Rail
MC74HC573ADTR2
TSSOP−20*
2500 Tape & Reel
MC74HC573ADTR2G
TSSOP−20*
2500 Tape & Reel
MC74HC573AFEL
SOEIAJ−20
2000 Tape & Reel
MC74HC573AFELG
SOEIAJ−20
(Pb−Free)
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
2