CAT64LC40 Datasheet, PDF (5/12 Pages) ON Semiconductor – 4 kb SPI Serial EEPROM

CAT64LC40
Device Operation
The CAT64LC40 is a 4 kb nonvolatile memory intended
for use with all standard controllers. The CAT64LC40 is
organized in a 256 x 16 format. All instructions are based on
an 8−bit format. There are four 16−bit instructions: READ,
WRITE, EWEN, and EWDS. The CAT64LC40 operates on
a single power supply ranging from 2.5 V to 6.0 V and it has
an on−chip voltage generator to provide the high voltage
needed during a programming operation. Instructions,
addresses and data to be written are clocked into the DI pin
on the rising edge of the SK clock. The DO pin is normally
in a high impedance state except when outputting data in a
READ operation or outputting RDY/BSY status when
polled during a WRITE operation.
The format for all instructions sent to this device includes
a 4−bit start sequence, 1010, a 4−bit op code and an 8−bit
address field or dummy bits. For a WRITE operation, a
16−bit data field is also required following the 8−bit address
field.
RESET
SK
DI
CS
DO
RDY/BUSY
t_RESS
t_DIS
t_DIH
t_CSS
t_RC
t_RESH
t_SKLOW
t_SKHI
t_CSH
t_PD0, t_PD1
t_HZ
t_CSMIN
t_SV
t_SV
Figure 3. Synchronous Data Timing
RESET
SK
CS
DI
1 0 1 0 1 000
ADDRESS*
DO
RDY/BUSY
HIGH
Figure 4. Read Instruction Timing
*Please check the instruction set table for address
D15 D14
D1 D0
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