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AND8079 Datasheet, PDF (5/20 Pages) ON Semiconductor – A Low Cost DDR Memory Power Supply Using the NCP1571 Synchronous Buck Converter and a LM358 Based Linear Voltage Regulator
AND8079/D
Schottky Diode for Synchronous MOSFET
The efficiency of the buck converter can be improved
slightly by placing a Schottky diode (D1) in parallel with the
bottom MOSFET (Q3). The body diode of Q3 is used to
conduct current during the non-overlap time when both the
top (Q2) and bottom (Q3) MOSFETs are turned OFF. But
because the non-overlap time is only approximately 50 ns
for the NCP1571’s 200 kHz switching speed, the efficiency
savings will be only approximately 1.0%. The
demonstration board included a provision for D1; however,
the performance of the circuit was not testing with this
diode.
Experimental Results
The experimental results of the demonstration PCB are
shown in Figures 4 through 20. Figure 3 shows the test setup
used to create the current load transients for the Vtt supply
voltage. The transient current load tests for the Vdd and Vtt
supply voltages were created using a Kikusui Electronic
Load Controller. Unless noted, the standard test conditions
are as listed below:
1. Ambient Temperature = 23_C
2. Vdd Current Load (IVdd) = 8.0 A
3. Vtt Current Load (IVtt) = 1.25 A source load
4. VREF Current Load (IREF) = 2.5 mA
5. 5.0 V Input Voltage = 5.00 V
6. 12 V Input Voltage = 12.00 V
7. -12 V Input Voltage = -12.00 V
Vtt DDR Circuit
2.5 V
Vdd
Q4
- 2.0 A
+ DC Current Source
-
R7
OUT
VREF
+
U2A
+
C22
Q5
+
C23
Vtt
+ Pulsating Current Source
-
Pulse Width = 100 ms
Period = 200 ms
l1 = 0 A
l2 = 4.0 A
Rise Time = 50 ms
Fall Time = 50 ms
DC Current Source
2.0 A
Vtt Circuit
2 .0 A
Vtt
0A
Pulsating Current Source
2.0 A Current Sink Test
DC Current Source
2.0 A
Vtt Circuit
2 .0 A
Vtt
4A
Pulsating Current Source
2.0 A Current Source Test
Figure 3. Vtt Transient Load Test Setup for a 2.0 A Sink to 2.0 A Source Test
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