MT9D115 Datasheet, PDF (45/66 Pages) ON Semiconductor – CMOS Digital Image Sensor

MT9D115: 1/5-Inch SOC Digital Image Sensor
Power Modes
Soft Reset
The host processor can reset the MT9D115 using the two-wire serial interface by writing
to SYSCTL 0x001A. Two types of soft reset are available. SYSCTL 0x001A[0] is used to
reset the MT9D115, which is similar to external RESET_BAR signal.
1. Set SYSCTL 0x001A1:0] to 0x3 to initiate internal reset cycle.
2. Wait 6000 EXTCLK cycles.
3. Reset SYSCTL 0x001A[0] to 0x0 for normal operation.
Figure 30: Soft Reset Operation
t1
EXTCLK
SCLK
SDATA
Mode
Write Soft
Reset Command
Reseting Registers
Registers Reset
to Default Values
Table 15: Soft Reset Signal Timing
Symbol
t₁
Parameter
Maximum soft reset time
Min Typ Max
Unit
–
–
6000 EXTCLKs
MT9D115 DS Rev. E Pub. 4/15 EN
45
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