NOIV1SE2000A-QDC Datasheet, PDF (44/77 Pages) ON Semiconductor – VITA 2000 2.3 Megapixel 92 FPS Global Shutter CMOS Image Sensor

NOIV1SN2000A, NOIV2SN2000A
• Window Identification
Frame synchronization codes are always followed by a
3-bit window identification (bits 2:0). This is an integer
number, ranging from 0 to 7, indicating the active window.
If more than one window is active for the current cycle, the
highest window ID is transmitted.
• Data Classification Codes
For the remaining cycles, the sync channel indicates the
type of data sent through the data links: black pixel data
(BL), image data (IMG), or training pattern (TR). These
codes are programmable by a register setting. The default
values are listed in Table 31.
Table 30. SYNCHRONIZATION CHANNEL DEFAULT IDENTIFICATION CODE VALUES FOR 10-BIT MODE
Sync Word Bit
Position
Register
Address
Default
Value
Description
9:0
132 [9:0]
0x015 Black pixel data (BL). This data is not part of the image. The black pixel data is used in-
ternally to correct channel offsets.
9:0
133 [9:0]
0x035 Valid pixel data (IMG). The data on the data output channels is valid pixel data (part of the
image).
9:0
134 [9:0]
0x059 CRC value. The data on the data output channels is the CRC code of the finished image
data line.
9:0
135 [9:0]
0x3A6 Training pattern (TR). The sync channel sends out the training pattern which can be pro-
grammed by a register setting.
Frame Synchronization in 8-bit Mode
The frame synchronization words are configured using
the same registers as in 10-bit mode. The two least
significant bits of these configuration registers are ignored
and not sent out. Table 32 shows the structure of the frame
synchronization code, together with the default value, as
specified in SPI registers. The same restriction for
overlapping windows applies in 8-bit mode.
Table 31. FRAME SYNCHRONIZATION CODE DETAILS FOR 8-BIT MODE
Sync Word Bit
Position
Register
Address
Default
Value
Description
7:5
N/A
0x5
Frame start (FS) indication
7:5
N/A
0x6
Frame end (FE) indication
7:5
N/A
0x1
Line start (LS) indication
7:5
N/A
0x2
Line end (LE) indication
4:0
[6:2]
0x0A These bits indicate that the received sync word is a frame synchronization code. The
value is programmable by a register setting.
• Window Identification
Similar to 10-bit operation mode, the frame
synchronization codes are followed by a window
identification. The window ID is located in bits 4:2 (all other
bit positions are ‘0’). The same restriction for overlapping
windows applies in 8-bit mode.
• Data Classification Codes
BL, IMG, CRC, and TR codes are defined by the same
registers as in 10-bit mode. Bits 9:2 of the respective
configuration registers are used as classification code with
default values shown in Table 33.
Table 32. SYNCHRONIZATION CHANNEL DEFAULT IDENTIFICATION CODE VALUES FOR 8-BIT MODE
Sync Word Bit
Position
Register
Address
Default
Value
Description
7:0
132 [9:2]
0x05
Black pixel data (BL). This data is not part of the image. The black pixel data is used in-
ternally to correct channel offsets.
7:0
133 [9:2]
0x0D Valid pixel data (IMG). The data on the data output channels is valid pixel data (part of
the image).
7:0
134 [9:2]
0x16
CRC value. The data on the data output channels is the CRC code of the finished image
data line.
7:0
135 [9:2]
0xE9
Training Pattern (TR). The sync channel sends out the training pattern which can be pro-
grammed by a register setting.
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